401 lines
8.8 KiB
ArmAsm
401 lines
8.8 KiB
ArmAsm
// Copyright 2018 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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// +build s390x,go1.11,!gccgo,!appengine
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#include "textflag.h"
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// Implementation of Poly1305 using the vector facility (vx).
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// constants
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#define MOD26 V0
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#define EX0 V1
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#define EX1 V2
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#define EX2 V3
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// temporaries
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#define T_0 V4
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#define T_1 V5
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#define T_2 V6
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#define T_3 V7
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#define T_4 V8
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// key (r)
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#define R_0 V9
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#define R_1 V10
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#define R_2 V11
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#define R_3 V12
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#define R_4 V13
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#define R5_1 V14
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#define R5_2 V15
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#define R5_3 V16
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#define R5_4 V17
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#define RSAVE_0 R5
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#define RSAVE_1 R6
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#define RSAVE_2 R7
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#define RSAVE_3 R8
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#define RSAVE_4 R9
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#define R5SAVE_1 V28
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#define R5SAVE_2 V29
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#define R5SAVE_3 V30
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#define R5SAVE_4 V31
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// message block
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#define F_0 V18
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#define F_1 V19
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#define F_2 V20
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#define F_3 V21
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#define F_4 V22
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// accumulator
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#define H_0 V23
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#define H_1 V24
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#define H_2 V25
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#define H_3 V26
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#define H_4 V27
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GLOBL ·keyMask<>(SB), RODATA, $16
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DATA ·keyMask<>+0(SB)/8, $0xffffff0ffcffff0f
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DATA ·keyMask<>+8(SB)/8, $0xfcffff0ffcffff0f
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GLOBL ·bswapMask<>(SB), RODATA, $16
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DATA ·bswapMask<>+0(SB)/8, $0x0f0e0d0c0b0a0908
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DATA ·bswapMask<>+8(SB)/8, $0x0706050403020100
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GLOBL ·constants<>(SB), RODATA, $64
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// MOD26
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DATA ·constants<>+0(SB)/8, $0x3ffffff
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DATA ·constants<>+8(SB)/8, $0x3ffffff
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// EX0
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DATA ·constants<>+16(SB)/8, $0x0006050403020100
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DATA ·constants<>+24(SB)/8, $0x1016151413121110
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// EX1
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DATA ·constants<>+32(SB)/8, $0x060c0b0a09080706
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DATA ·constants<>+40(SB)/8, $0x161c1b1a19181716
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// EX2
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DATA ·constants<>+48(SB)/8, $0x0d0d0d0d0d0f0e0d
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DATA ·constants<>+56(SB)/8, $0x1d1d1d1d1d1f1e1d
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// h = (f*g) % (2**130-5) [partial reduction]
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#define MULTIPLY(f0, f1, f2, f3, f4, g0, g1, g2, g3, g4, g51, g52, g53, g54, h0, h1, h2, h3, h4) \
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VMLOF f0, g0, h0 \
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VMLOF f0, g1, h1 \
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VMLOF f0, g2, h2 \
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VMLOF f0, g3, h3 \
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VMLOF f0, g4, h4 \
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VMLOF f1, g54, T_0 \
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VMLOF f1, g0, T_1 \
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VMLOF f1, g1, T_2 \
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VMLOF f1, g2, T_3 \
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VMLOF f1, g3, T_4 \
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VMALOF f2, g53, h0, h0 \
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VMALOF f2, g54, h1, h1 \
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VMALOF f2, g0, h2, h2 \
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VMALOF f2, g1, h3, h3 \
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VMALOF f2, g2, h4, h4 \
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VMALOF f3, g52, T_0, T_0 \
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VMALOF f3, g53, T_1, T_1 \
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VMALOF f3, g54, T_2, T_2 \
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VMALOF f3, g0, T_3, T_3 \
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VMALOF f3, g1, T_4, T_4 \
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VMALOF f4, g51, h0, h0 \
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VMALOF f4, g52, h1, h1 \
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VMALOF f4, g53, h2, h2 \
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VMALOF f4, g54, h3, h3 \
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VMALOF f4, g0, h4, h4 \
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VAG T_0, h0, h0 \
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VAG T_1, h1, h1 \
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VAG T_2, h2, h2 \
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VAG T_3, h3, h3 \
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VAG T_4, h4, h4
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// carry h0->h1 h3->h4, h1->h2 h4->h0, h0->h1 h2->h3, h3->h4
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#define REDUCE(h0, h1, h2, h3, h4) \
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VESRLG $26, h0, T_0 \
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VESRLG $26, h3, T_1 \
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VN MOD26, h0, h0 \
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VN MOD26, h3, h3 \
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VAG T_0, h1, h1 \
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VAG T_1, h4, h4 \
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VESRLG $26, h1, T_2 \
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VESRLG $26, h4, T_3 \
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VN MOD26, h1, h1 \
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VN MOD26, h4, h4 \
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VESLG $2, T_3, T_4 \
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VAG T_3, T_4, T_4 \
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VAG T_2, h2, h2 \
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VAG T_4, h0, h0 \
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VESRLG $26, h2, T_0 \
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VESRLG $26, h0, T_1 \
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VN MOD26, h2, h2 \
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VN MOD26, h0, h0 \
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VAG T_0, h3, h3 \
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VAG T_1, h1, h1 \
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VESRLG $26, h3, T_2 \
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VN MOD26, h3, h3 \
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VAG T_2, h4, h4
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// expand in0 into d[0] and in1 into d[1]
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#define EXPAND(in0, in1, d0, d1, d2, d3, d4) \
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VGBM $0x0707, d1 \ // d1=tmp
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VPERM in0, in1, EX2, d4 \
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VPERM in0, in1, EX0, d0 \
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VPERM in0, in1, EX1, d2 \
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VN d1, d4, d4 \
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VESRLG $26, d0, d1 \
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VESRLG $30, d2, d3 \
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VESRLG $4, d2, d2 \
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VN MOD26, d0, d0 \
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VN MOD26, d1, d1 \
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VN MOD26, d2, d2 \
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VN MOD26, d3, d3
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// pack h4:h0 into h1:h0 (no carry)
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#define PACK(h0, h1, h2, h3, h4) \
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VESLG $26, h1, h1 \
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VESLG $26, h3, h3 \
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VO h0, h1, h0 \
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VO h2, h3, h2 \
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VESLG $4, h2, h2 \
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VLEIB $7, $48, h1 \
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VSLB h1, h2, h2 \
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VO h0, h2, h0 \
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VLEIB $7, $104, h1 \
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VSLB h1, h4, h3 \
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VO h3, h0, h0 \
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VLEIB $7, $24, h1 \
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VSRLB h1, h4, h1
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// if h > 2**130-5 then h -= 2**130-5
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#define MOD(h0, h1, t0, t1, t2) \
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VZERO t0 \
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VLEIG $1, $5, t0 \
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VACCQ h0, t0, t1 \
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VAQ h0, t0, t0 \
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VONE t2 \
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VLEIG $1, $-4, t2 \
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VAQ t2, t1, t1 \
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VACCQ h1, t1, t1 \
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VONE t2 \
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VAQ t2, t1, t1 \
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VN h0, t1, t2 \
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VNC t0, t1, t1 \
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VO t1, t2, h0
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// func poly1305vx(out *[16]byte, m *byte, mlen uint64, key *[32]key)
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TEXT ·poly1305vx(SB), $0-32
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// This code processes up to 2 blocks (32 bytes) per iteration
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// using the algorithm described in:
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// NEON crypto, Daniel J. Bernstein & Peter Schwabe
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// https://cryptojedi.org/papers/neoncrypto-20120320.pdf
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LMG out+0(FP), R1, R4 // R1=out, R2=m, R3=mlen, R4=key
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// load MOD26, EX0, EX1 and EX2
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MOVD $·constants<>(SB), R5
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VLM (R5), MOD26, EX2
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// setup r
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VL (R4), T_0
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MOVD $·keyMask<>(SB), R6
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VL (R6), T_1
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VN T_0, T_1, T_0
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EXPAND(T_0, T_0, R_0, R_1, R_2, R_3, R_4)
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// setup r*5
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VLEIG $0, $5, T_0
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VLEIG $1, $5, T_0
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// store r (for final block)
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VMLOF T_0, R_1, R5SAVE_1
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VMLOF T_0, R_2, R5SAVE_2
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VMLOF T_0, R_3, R5SAVE_3
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VMLOF T_0, R_4, R5SAVE_4
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VLGVG $0, R_0, RSAVE_0
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VLGVG $0, R_1, RSAVE_1
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VLGVG $0, R_2, RSAVE_2
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VLGVG $0, R_3, RSAVE_3
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VLGVG $0, R_4, RSAVE_4
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// skip r**2 calculation
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CMPBLE R3, $16, skip
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// calculate r**2
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MULTIPLY(R_0, R_1, R_2, R_3, R_4, R_0, R_1, R_2, R_3, R_4, R5SAVE_1, R5SAVE_2, R5SAVE_3, R5SAVE_4, H_0, H_1, H_2, H_3, H_4)
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REDUCE(H_0, H_1, H_2, H_3, H_4)
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VLEIG $0, $5, T_0
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VLEIG $1, $5, T_0
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VMLOF T_0, H_1, R5_1
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VMLOF T_0, H_2, R5_2
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VMLOF T_0, H_3, R5_3
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VMLOF T_0, H_4, R5_4
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VLR H_0, R_0
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VLR H_1, R_1
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VLR H_2, R_2
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VLR H_3, R_3
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VLR H_4, R_4
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// initialize h
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VZERO H_0
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VZERO H_1
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VZERO H_2
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VZERO H_3
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VZERO H_4
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loop:
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CMPBLE R3, $32, b2
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VLM (R2), T_0, T_1
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SUB $32, R3
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MOVD $32(R2), R2
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EXPAND(T_0, T_1, F_0, F_1, F_2, F_3, F_4)
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VLEIB $4, $1, F_4
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VLEIB $12, $1, F_4
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multiply:
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VAG H_0, F_0, F_0
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VAG H_1, F_1, F_1
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VAG H_2, F_2, F_2
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VAG H_3, F_3, F_3
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VAG H_4, F_4, F_4
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MULTIPLY(F_0, F_1, F_2, F_3, F_4, R_0, R_1, R_2, R_3, R_4, R5_1, R5_2, R5_3, R5_4, H_0, H_1, H_2, H_3, H_4)
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REDUCE(H_0, H_1, H_2, H_3, H_4)
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CMPBNE R3, $0, loop
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finish:
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// sum vectors
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VZERO T_0
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VSUMQG H_0, T_0, H_0
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VSUMQG H_1, T_0, H_1
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VSUMQG H_2, T_0, H_2
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VSUMQG H_3, T_0, H_3
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VSUMQG H_4, T_0, H_4
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// h may be >= 2*(2**130-5) so we need to reduce it again
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REDUCE(H_0, H_1, H_2, H_3, H_4)
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// carry h1->h4
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VESRLG $26, H_1, T_1
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VN MOD26, H_1, H_1
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VAQ T_1, H_2, H_2
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VESRLG $26, H_2, T_2
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VN MOD26, H_2, H_2
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VAQ T_2, H_3, H_3
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VESRLG $26, H_3, T_3
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VN MOD26, H_3, H_3
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VAQ T_3, H_4, H_4
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// h is now < 2*(2**130-5)
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// pack h into h1 (hi) and h0 (lo)
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PACK(H_0, H_1, H_2, H_3, H_4)
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// if h > 2**130-5 then h -= 2**130-5
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MOD(H_0, H_1, T_0, T_1, T_2)
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// h += s
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MOVD $·bswapMask<>(SB), R5
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VL (R5), T_1
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VL 16(R4), T_0
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VPERM T_0, T_0, T_1, T_0 // reverse bytes (to big)
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VAQ T_0, H_0, H_0
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VPERM H_0, H_0, T_1, H_0 // reverse bytes (to little)
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VST H_0, (R1)
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RET
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b2:
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CMPBLE R3, $16, b1
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// 2 blocks remaining
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SUB $17, R3
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VL (R2), T_0
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VLL R3, 16(R2), T_1
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ADD $1, R3
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MOVBZ $1, R0
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CMPBEQ R3, $16, 2(PC)
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VLVGB R3, R0, T_1
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EXPAND(T_0, T_1, F_0, F_1, F_2, F_3, F_4)
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CMPBNE R3, $16, 2(PC)
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VLEIB $12, $1, F_4
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VLEIB $4, $1, F_4
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// setup [r²,r]
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VLVGG $1, RSAVE_0, R_0
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VLVGG $1, RSAVE_1, R_1
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VLVGG $1, RSAVE_2, R_2
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VLVGG $1, RSAVE_3, R_3
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VLVGG $1, RSAVE_4, R_4
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VPDI $0, R5_1, R5SAVE_1, R5_1
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VPDI $0, R5_2, R5SAVE_2, R5_2
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VPDI $0, R5_3, R5SAVE_3, R5_3
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VPDI $0, R5_4, R5SAVE_4, R5_4
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MOVD $0, R3
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BR multiply
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skip:
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VZERO H_0
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VZERO H_1
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VZERO H_2
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VZERO H_3
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VZERO H_4
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CMPBEQ R3, $0, finish
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b1:
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// 1 block remaining
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SUB $1, R3
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VLL R3, (R2), T_0
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ADD $1, R3
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MOVBZ $1, R0
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CMPBEQ R3, $16, 2(PC)
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VLVGB R3, R0, T_0
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VZERO T_1
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EXPAND(T_0, T_1, F_0, F_1, F_2, F_3, F_4)
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CMPBNE R3, $16, 2(PC)
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VLEIB $4, $1, F_4
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VLEIG $1, $1, R_0
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VZERO R_1
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VZERO R_2
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VZERO R_3
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VZERO R_4
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VZERO R5_1
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VZERO R5_2
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VZERO R5_3
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VZERO R5_4
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// setup [r, 1]
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VLVGG $0, RSAVE_0, R_0
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VLVGG $0, RSAVE_1, R_1
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VLVGG $0, RSAVE_2, R_2
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VLVGG $0, RSAVE_3, R_3
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VLVGG $0, RSAVE_4, R_4
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VPDI $0, R5SAVE_1, R5_1, R5_1
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VPDI $0, R5SAVE_2, R5_2, R5_2
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VPDI $0, R5SAVE_3, R5_3, R5_3
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VPDI $0, R5SAVE_4, R5_4, R5_4
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MOVD $0, R3
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BR multiply
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TEXT ·hasVectorFacility(SB), NOSPLIT, $24-1
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MOVD $x-24(SP), R1
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XC $24, 0(R1), 0(R1) // clear the storage
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MOVD $2, R0 // R0 is the number of double words stored -1
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WORD $0xB2B01000 // STFLE 0(R1)
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XOR R0, R0 // reset the value of R0
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MOVBZ z-8(SP), R1
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AND $0x40, R1
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BEQ novector
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vectorinstalled:
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// check if the vector instruction has been enabled
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VLEIB $0, $0xF, V16
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VLGVB $0, V16, R1
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CMPBNE R1, $0xF, novector
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MOVB $1, ret+0(FP) // have vx
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RET
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novector:
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MOVB $0, ret+0(FP) // no vx
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RET
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